MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 491

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Freescale Semiconductor
0x3_14C0–0x3_14DF Gather link tables
0x3_1480–0x3_14BF DB4—Crypto-channel 4 descriptor buffers
0x3_14E0–0x3_14FF Scatter link tables
0x3_2800–0x3_2FFF DEU FIFO
0x3_4800–0x3_4FFF AESU FIFO
0x3_4100–0x3_4108
0x3_4400–0x3_4408
Address Offset
(AD 17–0)
0x3_2000
0x3_2008
0x3_2010
0x3_2018
0x3_2028
0x3_2030
0x3_2038
0x3_2050
0x3_2100
0x3_2400
0x3_2408
0x3_2410
0x3_4000
0x3_4008
0x3_4010
0x3_4018
0x3_4028
0x3_4030
0x3_4038
0x3_4050
0x3_6000
0x3_6008
0x3_6010
0x3_6018
0x3_6028
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
[0–7]
DEUMR—DEU mode register
DEUKSR—DEU key size register
DEUDSR—DEU data size register
DEURCR—DEU reset control register
DEUSR—DEU status register
DEUISR—DEU interrupt status register
DEUICR—DEU interrupt control register
DEUEUG—DEU EU go register
DEUIV—DEU initialization vector register
DEUK1—DEU key register 1
DEUK2—DEU key register 2
DEUK3—DEU key register 3
AESUMR—AESU mode register
AESUKSR—AESU key size register
AESUDSR—AESU data size register
AESURCR—AESU reset control register
AESUSR—AESU status register
AESUISR—AESU interrupt status register
AESUICR—AESU interrupt control
register
AESUEUG—AESU EU go register
AESU context memory registers
AESU key memory
MDEUMR—MDEU mode register
MDEUKSR—MDEU key size register
MDEUDSR—MDEU data size register
MDEURCR—MDEU reset control register
MDEUSR—MDEU status register
Advanced Encryption Standard Execution Unit (AESU)
Data Encryption Standard Execution Unit (DEU)
Table 12-3. SEC Address Map (continued)
Register
Message Digest Execution Unit (MDEU)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
W
W
R
R
R
R
R
R
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_3000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_1000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
Reset
—
—
—
Security Engine (SEC) 2.1
12.4.6.9.5/12-79
12.4.6.9.6/12-79
12.5.1.5/12-102
12.5.1.6/12-102
12.5.1.6/12-102
12.4.2.10/12-41
12.4.2.10/12-41
12.4.2.10/12-41
12.4.2.11/12-41
12.4.2.1/12-33
12.4.2.2/12-34
12.4.2.3/12-35
12.4.2.4/12-35
12.4.2.5/12-36
12.4.2.6/12-37
12.4.2.7/12-39
12.4.2.8/12-40
12.4.2.9/12-41
12.4.6.1/12-67
12.4.6.2/12-69
12.4.6.3/12-69
12.4.6.4/12-70
12.4.6.5/12-71
12.4.6.6/12-72
12.4.6.7/12-73
12.4.6.8/12-74
12.4.6.9/12-75
12.4.4.1/12-50
12.4.4.3/12-54
12.4.4.4/12-54
12.4.4.5/12-55
12.4.4.6/12-55
Reference
12-13