MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 1186

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MPC8533EVTAQGA

Manufacturer Part Number
MPC8533EVTAQGA
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTAQGA

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.0GHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
783-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Part Number
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Part Number:
MPC8533EVTAQGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Global Utilities
Note that the software that writes to either DEVDISR or POWMGTCR can be running either on the e500
core or on an external master that can write to the MPC8533E memory-mapped registers through the PCI
interfaces.
These features are described in further detail in this section.
19.5.1.1
The MPC8533E has three low-power states: doze, nap, and sleep. The mapping of core and device power
management states is shown in
core.
For each operating state represented in the diagram, the core’s state is listed first, with the corresponding
state of the MPC8533E shown beneath it in parenthesis. Note that there are many other variables that
control the state transitions between MPC8533E power management states. These additional variables are
described in more detail in
Table 19-29
19-26
Full On All units operating normally.
Mode
Doze
lists basic characteristics of the low-power modes and the full on mode.
Relationship Between Core and Device Power Management States
Core stops dispatching new instructions (core is halted)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 19-29. MPC8533E Power Management Modes—Basic Description
Figure 19-26. e500 Core Power Management State Diagram
Section 19.5.1.7, “Power-Down Sequence Coordination.”
core_stop & core_halt
Figure 19-26
Description
¬ core_tben
core_halt
showing state transitions from the perspective of the e500
Core-Stopped
Core-Stopped
Core-Halted
Full On
(Sleep)
(Doze)
(Nap)
¬ core_halt
¬ core_stop
core_tben
¬ core_halt
core_halt & ¬ core_stop
core_stop
¬ core_tben
Core Responds To
Snoop
Yes
Yes
Interrupts READY ASLEEP
Yes
Yes
Freescale Semiconductor
Asserted Negated
Negated Negated
Signal States

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