MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 412

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Programmable Interrupt Controller
10-16
0x5_0800–
0x5_1680–
0x5_1CA0 MSIVPR5—Shared message signaled interrupt vector/priority register 5 Mixed
0x5_1CB0 MSIDR5—Shared message signaled interrupt destination register 5
0x5_1CC0 MSIVPR6—Shared message signaled interrupt vector/priority register 6 Mixed
0x5_1CD0 MSIDR6—Shared message signaled interrupt destination register 6
0x5_1CE0 MSIVPR7—Shared message signaled interrupt vector/priority register 7 Mixed
0x5_07A0 IIVPR45—Internal interrupt 45 vector/priority register
0x5_07B0 IIDR45—Internal interrupt 45 destination register
0x5_07C0 IIVPR46—Internal interrupt 46 vector/priority register
0x5_07D0 IIDR46—Internal interrupt 46 destination register
0x5_07E0 IIVPR47—Internal interrupt 47 vector/priority register
0x5_1BF0
0x5_1C00 MSIVPR0—Shared message signaled interrupt vector/priority register 0 Mixed
0x5_1C10 MSIDR0—Shared message signaled interrupt destination register 0
0x5_1C20 MSIVPR1—Shared message signaled interrupt vector/priority register 1 Mixed
0x5_1C30 MSIDR1—Shared message signaled interrupt destination register 1
0x5_1C40 MSIVPR2—Shared message signaled interrupt vector/priority register 2 Mixed
0x5_1C50 MSIDR2—Shared message signaled interrupt destination register 2
0x5_1C60 MSIVPR3—Shared message signaled interrupt vector/priority register 3 Mixed
0x5_1C70 MSIDR3—Shared message signaled interrupt destination register 3
0x5_1C80 MSIVPR4—Shared message signaled interrupt vector/priority register 4 Mixed
0x5_1C90 MSIDR4—Shared message signaled interrupt destination register 4
0x5_07F0 IIDR47—Internal interrupt 47 destination register
0x5_15F0
0x5_1600 MIVPR0—Messaging interrupt 0 (MSG 0) vector/priority register
0x5_1610 MIDR0—Messaging interrupt 0 (MSG 0) destination register
0x5_1620 MIVPR1—Messaging interrupt 1 (MSG 1) vector/priority register
0x5_1630 MIDR1—Messaging interrupt 1 (MSG 1) destination register
0x5_1640 MIVPR2—Messaging interrupt 2 (MSG 2) vector/priority register
0x5_1650 MIDR2—Messaging interrupt 2 (MSG 2) destination register
0x5_1660 MIVPR3—Messaging interrupt 3 (MSG 3) vector/priority register
0x5_1670 MIDR3—Messaging interrupt 3 (MSG 3) destination register
Offset
Reserved
Reserved
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 10-6. PIC Register Address Map (continued)
Register
Access
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
Mixed
—
—
0x0000_0001
0x0000_0001
0x8080_0000
0x0000_0001
0x8000_0000
0x0000_0001
0x8000_0000
0x0000_0001
0x8000_0000
0x0000_0001
0x1000_0000
0x0000_0001
0x1000_0000
0x0000_0001
0x1000_0000
0x0000_0001
0x1000_0000
0x0000_0001
0x1000_0000
0x0000_0001
0x1000_0000
0x1000_0000
0x1000_0000
0x8080_0000
0x8080_0000
0x0000_0001
0x8000_0000
0x0000_0001
0x0000_0001
Reset
Freescale Semiconductor
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