MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 1252

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MPC8533EVTAQGA

Manufacturer Part Number
MPC8533EVTAQGA
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTAQGA

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.0GHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
783-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Quantity
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Part Number:
MPC8533EVTAQGA
Manufacturer:
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Quantity:
10 000
Debug Features and Watchpoint Facility
Table 21-27
Figure 21-21
Table 21-28
21-28
Reset
10–13
14–18
19–31
32–63
W
R
Bits
5–9
0–4
10–13
14–18
19–31
32–63
Bits
0–4
5–9
DDRTT DDRSID
0
DDRADDR
CMDADDR
DDRSID
DDRBC
DDRTT
describes the fields of CMD trace buffer entries.
describes the fields of DDR SDRAM trace buffer entries when TBCR1[IFSEL] = 001.
CMDSID
CMDTID
4
Name
CMDBC
CMDTT
shows the trace buffer entry format for the DDR SDRAM interface, TBCR1[IFSEL] = 001.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Name
Table 21-27. CMD Trace Buffer Entry Field Descriptions (TBCR1[IFSEL] = 000)
Table 21-28. DDR Trace Buffer Entry Field Descriptions (TBCR1[IFSEL] = 001)
5
9
Transaction type. Specifies the transaction type as shown in
zeros maps to write.
Source ID. Specifies the source of the transaction as shown in
010101 indicates that DMA is the transaction source, and so on.
Reserved
Byte count
Reserved
Address bits 0–31
Transaction type. Specifies the transaction type as shown in
of zero indicates a write with local processor snoop condition.
Source ID. Identifies the source of the transaction as shown in
value of 010101 indicates that DMA is the transaction source.
Target ID. Identifies the target of the transaction as shown in
of 010101 indicates that DMA is the transaction target.
Byte count. Range: 32 to 1 where a value of 0 indicates 32 bytes.
00000 = 32 bytes
00001 = 1 byte
00010 = 2 bytes
11110 = 30 bytes
11111 = 31 bytes
Reserved
· · ·
Address bits 0–31
10
13
DDRBC
14
Figure 21-21. DDR Trace Buffer Entry
18
19
31
All zeros
32
Function
Function
Table
Table
Table
DDRADDR
Table
Table
21-12. For example, a value of all
21-12. For example, a value
21-26. For example, a value
21-26. For example, a value of
21-26. For example, a
Freescale Semiconductor
63

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