mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1021

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Chapter 42
Inter-Integrated Circuit (I2C)
42.1 Introduction
The inter-integrated circuit (I
communication between a number of devices. The interface is designed to operate up to
100 kbit/s with maximum bus loading and timing. The device is capable of operating at
higher baud rates, up to a maximum of clock/20, with reduced bus loading. The
maximum communication length and the number of devices that can be connected are
limited by a maximum bus capacitance of 400 pF. The I2C module also complies with
the System Management Bus (SMBus) Specification, version 2.
42.1.1 Features
The I2C module has these distinctive features:
Freescale Semiconductor, Inc.
• Compatible with The I
• Multimaster operation
• Software programmable for one of 64 different serial clock frequencies
• Software-selectable acknowledge bit
• Interrupt-driven byte-by-byte data transfer
• Arbitration-lost interrupt with automatic mode switching from master to slave
• Calling address identification interrupt
• START and STOP signal generation and detection
• Repeated START signal generation and detection
• Acknowledge bit generation and detection
• Bus busy detection
• General call recognition
• 10-bit address extension
• Support for System Management Bus (SMBus) Specification, version 2
• Programmable glitch input filter
• Low power mode wakeup on slave address match
MCF51JF128 Reference Manual, Rev. 2, 03/2011
2
C-Bus Specification
2
C, I2C, or IIC) module provides a method of
Preliminary
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