mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 970

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map/Register Definitions
39.4.13 Status Register (USBx_STAT)
The Status Register reports the transaction status within the USB Module. When the
processor's interrupt controller has received a TOKDNE interrupt the Status Register
should be read to determine the status of the previous endpoint communication. The data
in the status register is valid when the TOKDNE interrupt bit is asserted. The STAT
register is actually a read window into a status FIFO maintained by the USB Module.
When the USB Module uses a BD, it updates the Status Register. If another USB
transaction is performed before the TOKDNE interrupt is serviced, the USB Module
stores the status of the next transaction in the STAT FIFO. Thus the STAT register is
actually a four byte FIFO that allows the processor core to process one transaction while
the SIE is processing the next transaction. Clearing the TOKDNE bit in the ISTAT
register causes the SIE to update the STAT register with the contents of the next STAT
value. If the data in the STAT holding register is valid, the SIE immediately reasserts to
TOKDNE interrupt.
Addresses: USB0_STAT is FFFF_9000h base + 90h offset = FFFF_9090h
970
CRC5EOFEN
PIDERREN
ENDP
Field
Reset
Field
Read
7–4
Write
TX
1
0
3
Bit
CRC5/EOF Interrupt Enable
0
1
PIDERR Interrupt Enable
0
1
This four-bit field encodes the endpoint address that received or transmitted the previous token. This
allows the processor core to determine which BDT entry was updated by the last USB transaction.
Transmit Indicator
0
1
7
0
The CRC5/EOF interrupt is not enabled.
The CRC5/EOF interrupt is enabled.
The PIDERR interrupt is not enabled.
The PIDERR interrupt is enabled.
The most recent transaction was a Receive operation.
The most recent transaction was a Transmit operation.
USBx_ERREN field descriptions (continued)
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
ENDP
USBx_STAT field descriptions
Table continues on the next page...
0
5
Preliminary
0
4
Description
Description
TX
0
3
ODD
0
2
Freescale Semiconductor, Inc.
0
1
0
0
0