mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 935

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

applies to the MOSI output pin from a master and the MISO waveform applies to the
MISO output from a slave. The SS OUT waveform applies to the slave select output from
a master (provided MODFEN and SSOE = 1). The master SS output goes to active low at
the start of the first bit time of the transfer and goes back high one-half SPSCK cycle
after the end of the eighth bit time of the transfer. The SS IN waveform applies to the
slave select input of a slave.
When CPHA = 0, the slave begins to drive its MISO output with the first data bit value
(MSB or LSB depending on LSBFE) when SS goes to active low. The first SPSCK edge
causes both the master and the slave to sample the data bit values on their MISO and
MOSI inputs, respectively. At the second SPSCK edge, the SPI shifter shifts one bit
position which shifts in the bit value that was just sampled and shifts the second data bit
value out the other end of the shifter to the MOSI and MISO outputs of the master and
slave, respectively. When CPHA = 0, the slave's SS input must go to its inactive high
level between transfers.
Freescale Semiconductor, Inc.
(MISO OR MOSI)
(MASTER OUT)
(REFERENCE)
(SLAVE OUT)
SAMPLE IN
MSB FIRST
(CPOL = 0)
(CPOL = 1)
BIT TIME #
LSB FIRST
(MASTER)
(SLAVE)
SS OUT
SPSCK
SPSCK
MISO
MOSI
SS IN
BIT 7
BIT 0
Figure 38-39. SPI Clock Formats (CPHA = 0)
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MCF51JF128 Reference Manual, Rev. 2, 03/2011
BIT 6
BIT 1
2
Preliminary
...
...
...
BIT 2
BIT 5
6
Chapter 38 Serial Peripheral Interface (SPI)
BIT 1
BIT 6
7
BIT 0
BIT 7
8
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