mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1067

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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RWU
Field
SBK
ILIE
RIE
RE
TE
5
4
3
2
1
0
Receiver Full Interrupt or DMA Transfer Enable
RIE enables the S1[RDRF] flag, to generate interrupt requests or DMA transfer requests, based on the
state of C5[RDMAS].
0
1
Idle Line Interruptor Enable
ILIE enables the idle line flag, S1[IDLE], to generate interrupt requests, based on the state of
C5[ILDMAS].
0
1
Transmitter Enable
TE enables the UART transmitter.The TE bit can be used to queue an idle preamble by clearing and then
setting the TE bit. When 7816E is set/enabled and C7816[TTYPE] = 1, this bit is automatically cleared
after the requested block has been transmitted. This condition is detected when TL7816[TLEN] = 0 and
four additional characters have been transmitted.
0
1
Receiver Enable
RE enables the UART receiver.
0
1
Receiver Wakeup Control
This bit can be set to place the UART receiver in a standby state. RWU automatically clears when an
RWU event occurs (an IDLE event when C1[WAKE] is clear or an address match when C1[WAKE] is set).
This bit must be cleared when 7816E is set.
NOTE: RWU should only be set with C1[WAKE] = 0 (wakeup on idle) if the channel is currently not idle.
0
1
Send Break
Toggling SBK sends one break character (10, 11, or 12 logic 0s, if S2[BRK13] is cleared; 13 or 14 logic
0s, if S2[BRK13] is set). See
configurations. Toggling implies clearing the SBK bit before the break character has finished transmitting.
As long as SBK is set, the transmitter continues to send complete break characters (10, 11, or 12 bits, or
13 or 14 bits).This bit must be cleared when 7816E is set.
RDRF interrupt and DMA transfer requests disabled.
RDRF interrupt or DMA transfer requests enabled
IDLE interrupt requests disabled.
IDLE interrupt requests enabled.
Transmitter off.
Transmitter on.
Receiver off.
Receiver on.
Normal operation.
RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware
wakes the receiver by automatically clearing RWU.
This can be determined by the S2[RAF] flag. If set to wake up an IDLE event and the channel is
already idle, it is possible that the UART will discard data since data must be received (or a LIN
break detect) after an IDLE is detected before IDLE is allowed to reasserted.
UARTx_C2 field descriptions (continued)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Table continues on the next page...
Transmitting break characters
Chapter 43 Universal Asynchronous Receiver/Transmitter (UART)
Preliminary
Description
for the number of logic 0s for the different
1067

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