mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1278

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Register Descriptions
1278
DRc: 0x08 (PBR0)
R
W
Reset
R
W
Reset
Reset –
Reset –
DRc: 0x18 (PBR1)
Address
Address
31–0
31–1
Field
W
W
Field
R
R
Table 50-26. Program Counter Breakpoint Register n (PBRn, n = 1, 2, 3)
31
–
15
–
0x1A (PBR2)
0x1C (PBR3)
31
15
the flash, RAM, and RGPIO regions, and set to 0xFF when
referencing any of the slave peripheral devices.
Table 50-24. Program Counter Breakpoint Register 0 (PBR0)
30
–
14
–
30
–
14
–
PC breakpoint address
The address to be compared with the PC as a breakpoint trigger. Because all instruction sizes are
multiples of 2 bytes, bit 0 of the address should always be zero.
PC breakpoint address
The 31-bit address to be compared with the PC as a breakpoint trigger.
Description
Description
29
–
13
–
29
–
13
–
MCF51JF128 Reference Manual, Rev. 2, 03/2011
28
–
12
–
28
–
12
–
Table 50-25. PBR0 Field Descriptions
Table 50-27. PBRn Field Descriptions
27
–
11
–
27
–
11
–
Table continues on the next page...
26
–
10
–
26
–
10
–
25
–
9
–
25
–
9
–
Preliminary
Address
24
–
8
–
24
–
8
–
Address
Address
Address
23
–
7
–
23
–
7
–
22
–
6
–
22
–
6
–
21
–
5
–
21
–
5
–
20
–
4
–
20
–
4
–
Freescale Semiconductor, Inc.
Access: Supervisor write-only
Access: Supervisor write-only
19
3
19
3
–
–
–
–
18
–
2
–
18
–
2
–
BDM write-only
BDM write-only
17
–
1
–
17
–
1
–
16
–
0
–
16
–
0
0
V