mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 341

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Reset
15.4.2 Interrupt Mask Register Low (INTC_IMRL)
INTC_IMRL, along with INTC_IMRH, provides a bit map for each interrupt to allow the
request to be disabled (masked) (1 = disable the request, 0 = enable the request). The
IMR is cleared by reset, enabling all interrupt requests to preserve compatibility with
earlier V1 ColdFire devices. The IMR can be read and written directly, or individual
mask flags can be set or cleared by accessing set/clear interrupt mask registers
(INTC_SIMR, INTC_CIMR).
Each bit of the IMR[n] is associated with a corresponding bit of the interrupt request
input vector. The equations defining this association are:
For Vectors 64-102, n=Vector_Number - 64, else for Vectors 110-114, n = Vector_Number - 71
Therefore, vector 64 corresponds to n = 0, vector 65 to n = 1, etc., vector 113 to n = 42,
and vector 114 to n = 43.
Each peripheral request input is first qualified by the contents of the IMR registers before
it is used elsewhere in the interrupt controller, that is:
qualified_interrupt_request[n] = interrupt_request_input[n] + ~INTC_IMR[n]
Since this interrupt controller supports 44 request inputs, the upper 20 bits of the
INTC_IMRH are reserved for future use. Writes to these bits are ignored and reads return
zeroes.
The contents of the IMR do not affect the operation of the software settable force
interrupt registers.
Address: INTC_IMRL is FFFF_FFC0h base + Ch offset = FFFF_FFCCh
Freescale Semiconductor, Inc.
Bit
W
R
31
0
IMR31
IMR30
Field
31
30
30
0
29
0
28
0
Interrupt mask register 31
0
1
Interrupt mask register 30
27
0
The interrupt request is enabled.
The interrupt request is disabled.
26
0
25
0
24
0
MCF51JF128 Reference Manual, Rev. 2, 03/2011
23
0
22
0
INTC_IMRL field descriptions
21
0
Table continues on the next page...
20
0
19
0
18
0
Preliminary
17
0
16
0
15
0
Description
14
0
13
0
12
0
11
0
10
0
Chapter 15 Interrupt Controller (INTC)
0
9
0
8
0
7
0
6
0
5
4
0
0
3
0
2
0
1
341
0
0