mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 399

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

A system reset will cause a VLPS exit, returning the device to normal RUN mode.
17.4.5.3 BDM in Stop and VLPS Modes
If the MCU is unsecure, BDM is enabled, XCSR[ENBDM] is set prior to entering stop,
and the current mode is RUN (debug from VLPR is not supported), then the MCU can
support debugging using BDM. To support debugging, the CPU clock remains running
after the STOP instruction is executed. While the MCU is in stop or VLPS mode, some
restrictions affect which background debug commands can be used. Only the
BACKGROUND command and memory-access-with-status commands are available
when the MCU is in stop mode. The memory-access-with-status commands do not allow
memory access, but they report an error indicating that the MCU is in either stop or wait
mode.
The BACKGROUND command can wake the MCU from stop or VLPS mode and cause
it to enter active background mode. After entering halt mode, all background commands
are available.
17.4.5.4 Low-Leakage Stop (LLS) Mode
Low leakage stop (LLS) mode can be entered from normal RUN or VLPR modes.
By executing a STOP instruction while the MCU is in RUN or VLPR mode and device
configured as per
In LLS, the on-chip voltage regulator is in stop regulation. Most of the peripherals are put
in a state-retention mode that does not allow them to operate while in LLS.
Before entering LLS mode, user should configure the low leakage wake up (LLWU)
module to enable the desired wakeup sources. The available wakeup sources in LLS are
detailed in the Chip Configuration details for this device.
After wakeup from LLS, the device returns to normal RUN mode with a pending LLWU
module interrupt. In the LLWU interrupt service routine (ISR), user can poll the LLWU
module wakeup flags to determine the source of the wakeup.
Freescale Semiconductor, Inc.
When the chip is attempting to enter VLPS mode directly from
RUN mode while BDM is enabled, the MCU regulator remains
in full regulation. In other words, when BDM is enabled, the
regulation of the chip retains its previous state when executing
STOP.
Table 17-7
MCF51JF128 Reference Manual, Rev. 2, 03/2011
the MCU will enter LLS mode.
Preliminary
NOTE
Chapter 17 System Mode Controller (SMC)
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