mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 403

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Chapter 18
Power Management Controller (PMC)
18.1 Introduction
The PMC contains the internal voltage regulator, power on reset (POR), and low voltage
detect system.
18.2 Features
18.3 Low-Voltage Detect (LVD) System
This device includes a system to protect against low-voltage conditions to protect
memory contents and control MCU system states during supply voltage variations. The
system is comprised of a power-on reset (POR) circuit and a LVD circuit with a user-
selectable trip voltage: high (V
LVDSC1[LVDV] bits. The LVD is disabled upon entering VLPx, LLS, and VLLSx
modes.
Two flags are available to indicate the status of the low-voltage detect system:
Freescale Semiconductor, Inc.
• Internal voltage regulator
• Active POR providing brown-out detect
• Low-voltage detect supporting two low-voltage trip points with four warning levels
• The low voltage detect flag (LVDF) operates in a level sensitive manner. The LVDF
• The low voltage warning flag (LVWF) operates in a level sensitive manner. The
per trip point
bit is set when the supply voltage falls below the selected trip point (VLVD). The
LVDF bit is cleared by writing one to the LVDACK bit, but only if the internal
supply has returned above the trip point; otherwise, the LVDF bit remains set.
LVWF bit is set when the supply voltage falls below the selected monitor trip point
MCF51JF128 Reference Manual, Rev. 2, 03/2011
LVDH
) or low (V
Preliminary
LVDL
). The trip voltage is selected by the
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