mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1087

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mcf51jf128

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mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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43.3.22 UART 7816 Control Register (UARTx_C7816)
The C7816 register is the primary control register for ISO-7816 specific functionality.
This register is specific to 7816 functionality and the values in this register have no effect
on UART operation and should be ignored if ISO_7816E is not set/enabled. This register
may be read at anytime but values should only be changed when the ISO_7816E bit is not
set.
Addresses: UART0_C7816 is FFFF_8140h base + 18h offset = FFFF_8158h
Freescale Semiconductor, Inc.
Reserved
ONACK
ANACK
Field
Reset
Field
Read
7–5
Write
4
3
Bit
UART1_C7816 is FFFF_8160h base + 18h offset = FFFF_8178h
The value in this register indicates the number of datawords that are in the receive buffer/FIFO. If a
dataword is in the process of being received (i.e. in the receive shift register) it is not included in the
count. This value may be used in conjunction with the PFIFO[RXFIFOSIZE] field to calculate how much
room is left in the receive buffer/FIFO.
This read-only bitfield is reserved and always has the value zero.
Generate NACK on Overflow
When this bit is set, the receiver will automatically generate a NACK response if a receive buffer overrun
occurs as indicated by the S1[OR] field. In many systems this will result in the transmitter resending the
packet that overflowed until the retransmit threshold for that transmitter has been reached. A NACK is
only generated if TTYPE=0. This bit operates independently of ANACK. See
considerations.
0
1
Generate NACK on Error
When this bit is set, the receiver will automatically generate a NACK response if a parity error occurs or if
INIT is set and an invalid initial character is detected. A NACK is only generated if TTYPE = 0. If ANACK
is set the UART will attempt to retransmit the data indefinitely. To stop retransmission attempts, clear
C2[TE] or ISO_7816E and do not set until S1[TC] set C2[TE] again.
7
0
The received data does not generate a NACK when the receipt of the data results in an overflow
event.
If the receiver buffer overflows, a NACK is automatically sent on a received character.
UARTx_RCFIFO field descriptions (continued)
0
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
UARTx_C7816 field descriptions
Table continues on the next page...
0
5
Chapter 43 Universal Asynchronous Receiver/Transmitter (UART)
Preliminary
ONACK
0
4
Description
Description
ANACK
0
3
INIT
0
2
Overrun NACK
TTYPE
0
1
ISO_7816E
0
0
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