mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 789

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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36.7.3.1 Time Mode
When the modulator operates in time mode (MSC[MCGEN] bit is set, MSC[BASE] and
MSC[FSK] bits are cleared), the modulation mark period consists of an integer number of
CMTCLK ÷ 8 clock periods. The modulation space period consists of zero or an integer
number of CMTCLK ÷ 8 clock periods. With an 8 MHz IF and MSC[CMTDIV] = 00,
the modulator resolution is 1 μs and has a maximum mark and space period of about
65.535 ms each . See the following figure for an example of the time mode and baseband
mode outputs.
The mark and space time equations for time and baseband mode are:
t
t
where CMD1:CMD2 and CMD3:CMD4 are the decimal values of the concatenated
registers.
Freescale Semiconductor, Inc.
mark
space
= (CMD1:CMD2 + 1) ÷ (f
= CMD3:CMD4 ÷ (f
0
* DENOTES HIDDEN REGISTER
SPACE PERIOD REGISTER *
17-BIT DOWN COUNTER *
CMTCMD1:CMTCMD2
CMTCMD3:CMTCMD4
1 6 B IT S
1 6 B IT S
=?
1 6
1 6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Figure 36-16. Modulator Block Diagram
CMTCLK
CMTCLK
L O A D
÷ 8)
÷ 8)
Preliminary
SYSTEM CONTROL
CLOCK CONTROL
M O D E
MODULATOR GATE
Chapter 36 Carrier Modulator Transmitter (CMT)
MODULE INTERRUPT REQUEST
P R IM A R Y /S E C O N D A R Y S E L E C T
EOC FLAG SET
8
CARRIER OUT (f cg )
CMTCLOCK
MODULATOR
OUT
789

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