mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 116

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Timers
3.8.4.1 VREF Overview
The chip includes a voltage reference (VREF) intended to supply an accurate voltage
output that can be trimmed using the module's TRM[TRIM] field.
The VREF can provide a reference voltage to external peripherals or a reference to
analog peripherals, such as the ADC or CMP.
The VREF is not available on the 32-pin package.
3.9
3.9.1 Programmable Delay Block (PDB) Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
3.9.1.1 Module register width and serialization of accesses
This module's registers are 32 bits wide. Accesses via the 8-bit peripheral bus are
serialized: 32-bit accesses are serialized into four 8-bit accesses.
116
System memory map
Power management
Signal multiplexing
Full description
Clocking
Timers
Topic
Other peripherals
Table 3-37. Reference links to related information
Port mux control
Related module
MCF51JF128 Reference Manual, Rev. 2, 03/2011
PDB
Figure 3-28. PDB configuration
Transfers
Preliminary
Peripheral
bridge
PDB
Register
access
System memory map
Power management
Signal multiplexing
Clock distribution
Module signals
Reference
PDB
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