mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 977

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

39.4.22 BDT Page Register 3 (USBx_BDTPAGE3)
The Buffer Descriptor Table Page Register 3 contains an 8-bit value used to compute the
address where the current Buffer Descriptor Table (BDT) resides in system memory.
Addresses: USB0_BDTPAGE3 is FFFF_9000h base + B4h offset = FFFF_90B4h
39.4.23 Endpoint Control Register (USBx_ENDPTn)
The Endpoint Control Registers contain the endpoint control bits for each of the 16
endpoints available within the USB Module for a decoded address. The format for these
registers is shown in the following figure. Endpoint 0 (ENDPT0) is associated with
control pipe 0, which is required for all USB functions. Therefore, after a USBRST
interrupt occurs the processor core should set the ENDPT0 register to contain 0x0D.
In Host mode ENDPT0 is used to determine the handshake, retry and low speed
characteristics of the host transfer. For Host mode control, bulk and interrupt transfers the
EPHSHK bit should be set to 1. For Isochronous transfers it should be set to 0. Common
values to use for ENDPT0 in host mode are 0x4D for Control, Bulk, and Interrupt
transfers, and 0x4C for Isochronous transfers.
Freescale Semiconductor, Inc.
BDTBA
BDTBA
Field
Reset
Field
7–0
Read
7–0
Write
Bit
This 8 bit field provides address bits 23 through 16 of the BDT base address, which defines where the
Buffer Descriptor Table resides in system memory.
This 8 bit field provides address bits 31 through 24 of the BDT base address, which defines where the
Buffer Descriptor Table resides in system memory.
7
0
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
USBx_BDTPAGE2 field descriptions
USBx_BDTPAGE3 field descriptions
0
5
Preliminary
0
4
BDTBA
Description
Description
Chapter 39 Universal Serial Bus (USB) Controller
0
3
0
2
0
1
0
0
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