mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 145

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mcf51jf128

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mcf51jf128
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Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 5
Clock Distribution
5.1 Introduction
The multipurpose clock generator (MCG) module controls which clock source is used to
derive the system clocks. The clock generation logic divides the selected clock source
into a variety of clock domains, including the clocks for the system bus masters, system
bus slaves, and flash memory. The clock generation logic also implements module-
specific clock gating to allow granular shutoff of modules.
5.2 Clock distribution
The primary clocks for the system are generated from the MCGOUTCLK clock. The
clock generation circuitry provides several clock dividers that allow different portions of
the device to be clocked at different frequencies. This allows for tradeoffs between
performance and power dissipation.
Various modules have module-specific clocks that can be generated from the
MCGPLLCLK clock. In addition, there are various other module-specific clocks that
have other alternate sources. Clock selection for most modules is controlled by the SOPT
registers in the SIM module.
5.2.1 High-Level device clocking diagram
The high-level clock diagram is shown below.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Freescale Semiconductor, Inc.
145

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