mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 962

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map/Register Definitions
39.4.5 OTG Interrupt Status Register (USBx_OTGISTAT)
The OTG Interrupt Status Register records changes of the ID sense and VBUS signals.
Software can read this register to determine which event has caused an interrupt. Only
bits that have changed since the last software read are set. Writing a one to a bit clears the
associated interrupt.
Addresses: USB0_OTGISTAT is FFFF_9000h base + 10h offset = FFFF_9010h
962
SESSVLDCHG
B_SESS_CHG
LINE_STATE_
AVBUSCHG
ONEMSEC
Reserved
Reserved
IDCHG
CHG
Reset
Field
Read
Write
7
6
5
4
3
2
1
0
Bit
IDCHG
This bit is set when a change in the ID Signal from the USB connector is sensed.
This bit is set when the 1 millisecond timer expires. This bit stays asserted until cleared by software. The
interrupt must be serviced every millisecond to avoid losing 1msec counts.
This bit is set when the USB line state changes. The interrupt associated with this bit can be used to
detect Reset, Resume, Connect, and Data Line Pulse signals.
This read-only bit is reserved and always has the value zero.
This bit is set when a change in VBUS is detected indicating a session valid or a session no longer valid.
This bit is set when a change in VBUS is detected on a B device.
This read-only bit is reserved and always has the value zero.
This bit is set when a change in VBUS is detected on an A device.
7
0
ONEMSEC
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
USBx_OTGISTAT field descriptions
STATE_
LINE_
CHG
0
5
Preliminary
0
0
4
Description
SESSVLDCHG
0
3
B_SESS_CHG
0
2
Freescale Semiconductor, Inc.
0
0
1
AVBUSCHG
0
0