mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 667

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

29.4.10.1 Normal Stop mode with ADACK disabled
If the asynchronous clock, ADACK, is not selected as the conversion clock, executing a
stop instruction aborts the current conversion and places the ADC in its idle state. The
contents of the ADC registers, including Rn, are unaffected by Normal Stop mode. After
exiting from Normal Stop mode, a software or hardware trigger is required to resume
conversions.
29.4.10.2 Normal Stop mode with ADACK enabled
If ADACK is selected as the conversion clock, the ADC continues operation during
Normal Stop mode. Refer to the Chip Configuration chapter for configuration
information for this MCU.
If a conversion is in progress when the MCU enters Normal Stop mode, it continues until
completion. Conversions can be initiated while the MCU is in Normal Stop mode by
means of the hardware trigger or if continuous conversions are enabled.
If the compare and hardware averaging functions are disabled, a conversion complete
event sets the COCO and generates an ADC interrupt to wake the MCU from Normal
Stop mode if the respective ADC interrupt is enabled (AIEN = 1). The result register will
contain the data from the first completed conversion that occurred during Normal Stop
mode. If the hardware averaging function is enabled, the COCO will set (and generate an
interrupt if enabled) when the selected number of conversions are completed. If the
compare function is enabled, the COCO will set (and generate an interrupt if enabled)
only if the compare conditions are met. If a single conversion is selected and the compare
is not true, the ADC will return to its idle state and cannot wake the MCU from Normal
Stop mode unless a new conversion is initiated by another hardware trigger.
29.4.11 MCU Low Power Stop mode operation
The ADC module is automatically disabled when the MCU enters Low Power Stop
mode. All module registers contain their reset values following exit from Low Power
Stop mode. Therefore, the module must be re-enabled and re-configured following exit
from Low Power Stop mode.
Freescale Semiconductor, Inc.
For the chip specific modes of operation, refer to the Power
Management information for the device.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
NOTE
Chapter 29 Analog-to-Digital Converter (ADC)
667