mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1057

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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43.1.2 Modes of operation
The UART functions the same in all the normal modes.
It has two low power modes: Wait and Stop modes.
43.1.2.1 Run mode
Normal mode of operation.
43.1.2.2 Wait mode
UART operation in wait mode depends on the state of the C1[UARTSWAI] bit.
The C1[UARTSWAI] bit does not initiate any power down or power up procedures for
the smartcard (ISO-7816) interface.
Freescale Semiconductor, Inc.
• Receiver framing error detection
• Hardware parity generation and checking
• 1/16 bit-time noise detection
• DMA interface
• If the C1[UARTSWAI] bit is cleared, the UART operates normally when the CPU is
• If the C1[UARTSWAI] bit is set, UART clock generation ceases and the UART
in Wait mode.
module enters a power-conservation state when the CPU is in Wait mode.
• Receiver data buffer underflow
• Transmit data buffer overflow
• Noise error
• Framing error
• Parity error
• Active edge on receive pin
• LIN break detect
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Chapter 43 Universal Asynchronous Receiver/Transmitter (UART)
Preliminary
1057

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