mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 559

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

The read cycle timing diagram is shown in the following figure.
Freescale Semiconductor, Inc.
1. 1. Set FB_R/W to read.
2. Place address on the external address signals.
3. Assert transfer start.
1. Negate transfer start.
2. Assert FB_CSn.
1. Mini-FlexBus asserts internal transfer
1. Start next cycle.
The processor drives the data lines during the first clock cycle
of the transfer with the full 20-bit address. This may be ignored
by standard connected devices using non-multiplexed address
and data buses. However, some applications may find this
feature beneficial.
acknowledge (auto-acknowledge).
Microcontroller
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Figure 24-14. Read Cycle Flowchart
Preliminary
Note
1. Select the appropriate slave device.
2. Drive data on the external data signals.
1. Decode address.
Chapter 24 External Bus Interface (Mini-FlexBus)
System
559