mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 394

no-image

mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mcf51jf128VLH
Manufacturer:
MITSUBISHI
Quantity:
321
Part Number:
mcf51jf128VLH
Manufacturer:
FREESCALE
Quantity:
5 097
Part Number:
mcf51jf128VLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf51jf128VLH
Manufacturer:
FREESCALE
Quantity:
5 097
Functional Description
17.4.3 Run Modes
The device contains two different run modes:
17.4.3.1 RUN Mode
This is the normal operating mode for the device.
This mode is selected after any internal reset including LVD and when the BKGD/MS
pin is high after a POR exit or a BDM-initiated force reset. When the ColdFire processor
exits reset, it fetches initial 32-bit values for the supervisor stack pointer and program
counter from locations 0x00_0000 and 0x00_0004 respectively and user code execution
begins.
To reduce power in this mode, disable unused modules by clearing the peripherals
corresponding clock gating control bit in the SIM's registers.
17.4.3.2 Very Low Power Run (VLPR) Mode
In VLPR mode, the on-chip voltage regulator is put into a stop mode regulation state. In
this state, the regulator is designed to supply enough current to the MCU over a reduced
frequency. To further reduce power in this mode, disable the clocks to unused modules
using the peripherals' corresponding clock gating control bits in the SIM's registers.
Before entering this mode, the following conditions must be met:
394
• Run
• Very low power run (VLPR)
• The processor reads the start SP (SP_main) from vector-table offset 0x000
• The processor reads the start PC from vector-table offset 0x004
• LR is set to 0xFFFF_FFFF.
• The MCG must be configured in a mode which is supported during VLPR. See the
• The maximum frequencies of the system, bus, flash, and core are restricted. See the
• Mode protection must be set to allow VLP modes (PMPROT[AVLP] is 1).
• PMCTRL[RUNM] is set to 10b to enter VLPR.
• Flash programming/erasing is not allowed.
Power Management details for information about these MCG modes.
Power Management details about which frequencies are supported.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Freescale Semiconductor, Inc.

Related parts for mcf51jf128