mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 963

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

39.4.6 OTG Interrupt Control Register (USBx_OTGICR)
The OTG Interrupt Control Register enables the corresponding interrupt status bits
defined in the OTG Interrupt Status Register.
Addresses: USB0_OTGICR is FFFF_9000h base + 14h offset = FFFF_9014h
Freescale Semiconductor, Inc.
LINESTATEEN
ONEMSECEN
SESSVLDEN
AVBUSEN
BSESSEN
Reserved
Reserved
IDEN
Reset
Field
Read
Write
7
6
5
4
3
2
1
0
Bit
IDEN
ID interrupt enable
0
1
1 millisecond interrupt enable
0
1
Line State change interrupt enable
0
1
This read-only bit is reserved and always has the value zero.
Session valid interrupt enable
0
1
B Session END interrupt enable
0
1
This read-only bit is reserved and always has the value zero.
A VBUS Valid interrupt enable
0
1
7
0
The ID interrupt is disabled
The ID interrupt is enabled
The 1msec timer interrupt is disabled.
The 1msec timer interrupt is enabled.
The LINE_STAT_CHG interrupt is disabled.
The LINE_STAT_CHG interrupt is enabled
The SESSVLDCHG interrupt is disabled.
The SESSVLDCHG interrupt is enabled.
The B_SESS_CHG interrupt is disabled
The B_SESS_CHG interrupt is enabled
The AVBUSCHG interrupt is disabled
The AVBUSCHG interrupt is enabled
ONEMSECEN
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
USBx_OTGICR field descriptions
LINESTATEEN
0
5
Preliminary
0
0
4
Description
SESSVLDEN
Chapter 39 Universal Serial Bus (USB) Controller
0
3
BSESSEN
0
2
0
0
1
AVBUSEN
0
0
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