mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 481

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mcf51jf128

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mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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22.5 Functional description
The FMC is a flash acceleration unit with flexible buffers for user configuration. Besides
managing the interface between the chip and the program flash memory and
FlexMemory, the FMC can be used to customize the program flash memory cache and
buffer to provide single-cycle system clock data access times. Whenever a hit occurs for
the prefetch speculation buffer or the cache (when enabled), the requested data is
transferred within a single system clock. (The basic flash access time is two processor
cycles.)
Upon system reset, the FMC is configured to provide buffering for transfers from the
program flash memory. Prefetch support for data and instructions is enabled for program
flash accesses for crossbar switch master 0 (V1 ColdFire CPU). The program flash
memory cache is enabled and configured for instruction replacement.
Though the default configuration provides flash acceleration, advanced users may desire
to customize the FMC buffer configurations to maximize throughput for their use cases.
For example, the controls enable buffering per access type (data or instruction). When
reconfiguring the FMC, do not program the control and configuration inputs to the FMC
while the program flash memory or FlexMemory is being accessed. Instead, change them
with a routine executing from RAM in supervisor mode.
Freescale Semiconductor, Inc.
Changing settings while a flash access is in progress can lead to
non-deterministic behavior.
System software is required to maintain memory coherence
when any segment of the program flash memory cache is
programmed. For example, all buffer data associated with the
reprogrammed flash should be invalidated. Accordingly, cache
program visible writes must occur after a programming or erase
event is completed and before the new memory image is
accessed.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
NOTE
Chapter 22 Flash Memory Controller (FMC)
481

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