mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1042

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Functional Description
42.4.1.9 Clock Stretching
The clock synchronization mechanism can be used by slaves to slow down the bit rate of
a transfer. After the master drives SCL low, a slave can drive SCL low for the required
period and then release it. If the slave's SCL low period is greater than the master's SCL
low period, the resulting SCL bus signal's low period is stretched.
42.4.1.10 I2C Divider and Hold Values
1042
(hex)
ICR
0A
0B
0C
0D
0E
0F
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
Divider
SCL
104
128
20
22
24
26
28
30
34
40
28
32
36
40
44
48
56
68
48
56
64
72
80
88
80
Value
Hold
SDA
10
10
11
11
13
13
13
13
17
17
21
21
7
7
8
8
9
9
7
7
9
9
9
9
9
Table 42-67. I2C Divider and Hold Values
MCF51JF128 Reference Manual, Rev. 2, 03/2011
(Start)
Value
Hold
SCL
10
11
13
16
10
12
14
16
18
20
24
30
18
22
26
30
34
38
46
58
38
6
7
8
9
Table continues on the next page...
(Stop)
Value
Hold
SCL
11
12
13
14
15
16
18
21
15
17
19
21
23
25
29
35
25
29
33
37
41
45
53
65
41
Preliminary
(hex)
ICR
2A
2B
2C
2D
2E
20
21
22
23
24
25
26
27
28
29
2F
30
31
32
33
34
35
36
37
38
(clocks)
Divider
1024
1152
1280
1536
1920
1280
SCL
160
192
224
256
288
320
384
480
320
384
448
512
576
640
768
960
640
768
896
(clocks)
Hold
SDA
129
129
129
129
193
193
257
257
129
Freescale Semiconductor, Inc.
17
17
33
33
49
49
65
65
33
33
65
65
97
97
65
65
(Start)
Value
Hold
SCL
110
126
142
158
190
238
158
190
222
254
286
318
382
478
318
382
446
510
574
638
766
958
638
78
94
(Stop)
Value
Hold
SCL
113
129
145
161
193
241
161
193
225
257
289
321
385
481
321
385
449
513
577
641
769
961
641
81
97