mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 876

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Functional Description
37.4.13 Output Mask
The output mask register OUTMASK can be used to force channel outputs to their
inactive state through software (for example: to control a BLDC motor).
Any write to a CHnOM bits updates the OUTMASK write buffer. The CHnOM bit is
updated with the value of its corresponding bit in the OUTMASK write buffer according
to
If CHnOM = 1, then the channel (n) output is forced to its inactive state, defined by the
POLn bit in register POL. If CHnOM = 0, then the channel (n) output is unaffected by the
output mask function.
When a CHnOM bit is cleared, the channel (n) output is enabled (see the following
figure).
876
Figure 37-197. Example of the Deadtime Insertion (ELSnB:ELSnA = 1:0, POL(n) = 0, and
POL(n+1) = 0) when the Deadtime Delay Is Comparable To Channels (n) and (n+1) Duty
channel (n+1) output
channel (n+1) output
channel (n) output
channel (n+1) match
channel (n) output
(after deadtime
OUTMASK Register
(before deadtime
(before deadtime
(after deadtime
channel (n) match
FTM counter
insertion)
insertion)
insertion)
insertion)
Synchronization.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Cycle
Freescale Semiconductor, Inc.

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