mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 622

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory map and register descriptions
28.1.3 Modes of operation
Various MCU modes affect the CRC module's functionality.
28.1.3.1 Run mode
This is the basic mode of operation.
28.1.3.2 Low power modes (wait or stop)
Any CRC calculation in progress stops when the MCU enters a low power mode that
disables the module clock. It resumes after the clock is enabled or via the system reset for
exiting the low power mode. Clock gating for this module is MCU dependent.
28.2 Memory map and register descriptions
622
CRC Data Register
FFFF_8570
FFFF_8574
CRC Polynomial
Absolute
address
(hex)
Register
[31:24]
[23:16]
[31:24]
[23:16]
Figure 28-1. Programmable cyclic redundancy check (CRC) block diagram
[15:8]
[15:8]
[7:0]
[7:0]
CRC Data Register (CRC_CRC)
CRC Polynomial Register (CRC_GPOLY)
Combine
Reverse
Logic
Logic
TOT
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Seed
Data
Register name
WAS
Table continues on the next page...
Checksum
CRC memory map
Preliminary
CRC Engine
Polynomial
CRC Data
TCRC
(in bits)
Width
16-/32-bit Select
32
32
FXOR
Logic
NOT
Access
R/W
R/W
Reverse
TOTR
Logic
Freescale Semiconductor, Inc.
Reset value
0000_1021h
FFFF_
FFFFh
CRC Data Register
[31:24]
[23:16]
[15:8]
[7:0]
Section/
28.2.1/
28.2.2/
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