mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1260

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory Map and Register Descriptions
50.3.2 Extended Configuration/Status Register (XCSR)
The 32-bit XCSR is partitioned into two sections: the upper byte contains status and
command bits always accessible to the BDM interface, even if debug mode is disabled.
This status byte is also known as XCSR_SB. The lower 24 bits contain fields related to
the generation of automatic SYNC_PC commands, which can be used to periodically
capture and display the current program counter (PC) in the PST trace buffer (if properly
configured).
This table summarizes the methods for accessing the XCSR.
1260
READ_XCSR_BYTE
WRITE_XCSR_BYTE
READ_DREG
WRITE_DREG
Field
SSM
DDH
3–2
FID
4
1
0
Reference method
Single-step mode enable
0
1
Reserved; must be cleared.
Force ipg_debug
The core generates this output to the device, signaling it is in debug mode.
0
1
Disable ipg_debug due to a halt condition.
The core generates an output to the other modules in the device, signaling it is in debug mode. By
default, this output signal is asserted when the core halts.
0
1
Description
Table 50-6. CSR Field Descriptions (continued)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Table 50-7. XCSR Access Summary
Normal mode.
Single-step mode. The processor halts after execution of each instruction. While
halted, any BDM command can be executed. On receipt of the GO command, the
processor executes the next instruction and halts again. This process continues until
SSM is cleared.
Do not force the assertion of ipg_debug.
Force the assertion of ipg_debug.
Assert ipg_debug if the core is halted.
Negate ipg_debug due to the core being halted.
Table continues on the next page...
Preliminary
Reads bits 31–24 from the BDM interface. Available in all
modes.
Writes bits 31–24 from the BDM interface. Available in all
modes.
Reads bits 31–0 from the BDM interface. Classified as a non-
intrusive BDM command.
Writes bits 23–0 from the BDM interface. Classified as a non-
intrusive BDM command.
Details
Freescale Semiconductor, Inc.

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