mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 682

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map/Register Definitions
30.7.1 CMP Control Register 0 (CMPx_CR0)
Addresses: CMP0_CR0 is FFFF_8530h base + 0h offset = FFFF_8530h
682
FILTER_CNT
HYSTCTR
Reserved
Reserved
Reserved
Reset
Field
Read
6–4
1–0
Write
7
3
2
Bit
This read-only bit is reserved and always has the value zero.
Filter Sample Count
These bits represent the number of consecutive samples that must agree prior to the comparator ouput
filter accepting a new output state. For information regarding filter programming and latency reference the
Functional Description.
000
001
010
011
100
101
110
111
This read-only bit is reserved and always has the value zero.
This read-only bit is reserved and always has the value zero.
Comparator hard block hysteresis control
Defines the programmable hysteresis level. The hysteresis values associated with each level is device-
specific. See the device's data sheet for the exact values.
00
01
10
11
7
0
0
Level 0
Level 1
Level 2
Level 3
Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not
recommended). If SE = 0, COUT = COUTA.
1 consecutive sample must agree (comparator output is simply sampled).
2 consecutive samples must agree.
3 consecutive samples must agree.
4 consecutive samples must agree.
5 consecutive samples must agree.
6 consecutive samples must agree.
7 consecutive samples must agree.
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
FILTER_CNT
CMPx_CR0 field descriptions
0
5
Preliminary
0
4
Description
0
0
3
0
0
2
Freescale Semiconductor, Inc.
0
1
HYSTCTR
0
0