mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 385

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Address: SMC_PMCTRL is FFFF_8118h base + 1h offset = FFFF_8119h
Freescale Semiconductor, Inc.
Reserved
STOPM
STOPA
LPWUI
RUNM
Reset
Field
Read
6–5
2–0
Write
7
4
3
Bit
LPWUI
Low Power Wake Up on Interrupt
Causes the SMC to exit to normal RUN mode when any active MCU interrupt occurs while in a VLP mode
(VLPR, VLPW or VLPS).
NOTE: If VLPS mode was entered directly from RUN mode, the SMC will always exit back to normal
NOTE: LPWUI should only be modified while the system is in RUN mode i.e. when PMSTAT=RUN.
0
1
Run Mode Control
When written, this field causes entry into the selected run mode. Writes to this field are blocked if the
protection level has not been enabled using the PMPROT register. This field is cleared by hardware on
any exit to normal RUN mode.
NOTE: RUNM should only be set to VLPR when PMSTAT=RUN. Once written to VLPR, RUNM should
NOTE: RUNM should only be set to RUN when PMSTAT=VLPR. Once written to RUN, RUNM should
00
01
10
11
This read-only bit is reserved and always has the value zero.
Stop Aborted
When set, this read-only status bit indicates an interrupt or reset occured during the previous stop mode
entry sequence, preventing the system from entering that mode. This bit is cleared by hardware at the
beginning of any stop mode entry sequence and is set if the sequence was aborted.
0
1
Stop Mode Control
When written, this field controls entry into the selected stop mode when the next STOP instruction is
executed with STOPE=1 and WAITE=0 . When this field is set to VLLS, the VLLSCTRL register is used to
further select the particular VLLS sub-mode (VLLS3, VLLS2 or VLLS1) which will be entered. Writes to
this field are blocked if the protection level has not been enabled using the PMPROT register. After any
system reset, this field is cleared by hardware on any successful write to the PMPROT register.
7
0
The system remains in a VLP mode on an interrupt
The system exits to normal RUN mode on an interrupt
The previous stop mode entry was successsful.
The previous stop mode entry was aborted.
Normal run mode (RUN)
Reserved
Very low power run mode (VLPR)
Reserved
RUN mode regardless of the LPWUI setting.
not be written back to RUN until PMSTAT=VLPR.
not be written back to VLPR until PMSTAT=RUN.
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
RUNM
SMC_PMCTRL field descriptions
Table continues on the next page...
0
5
Preliminary
0
0
4
Description
STOPA
0
3
Chapter 17 System Mode Controller (SMC)
0
2
STOPM
0
1
0
0
385

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