mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 673

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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SC = Number of ADCK cycles used during sample window
CADIN = Internal ADC input capacitance
NUMTAU = -ln(LSBERR / 2
LSBERR = value of acceptable sampling error in LSBs
N = 8 in 8-bit mode, 10 in 10-bit mode, 12 in 12-bit mode
Higher source resistances or higher-accuracy sampling is possible by setting ADLSMP
and changing the ADLSTS bits (to increase the sample window) or decreasing ADCK
frequency to increase sample time.
29.6.2.2 Pin leakage error
Leakage on the I/O pins can cause conversion error if the external analog source
resistance (R
lower than V
mode, 10 in 10-bit mode, 12 in 12-bit mode).
29.6.2.3 Noise-induced errors
System noise that occurs during the sample or conversion process can affect the accuracy
of the conversion. The ADC accuracy numbers are guaranteed as specified only if the
following conditions are met:
Freescale Semiconductor, Inc.
• There is a 0.1 μF low-ESR capacitor from V
• There is a 0.1 μF low-ESR capacitor from V
• If inductive isolation is used from the primary supply, an additional 1 μF capacitor is
• V
• Operate the MCU in Wait or Normal Stop mode before initiating (hardware triggered
placed from V
plane.
conversions) or immediately after initiating (hardware or software triggered
conversions) the ADC conversion.
SSA
(and V
AS
REFH
) is high. If this error cannot be tolerated by the application, keep R
REFL
/ (4 × I
DDA
, if connected) is connected to V
to V
MCF51JF128 Reference Manual, Rev. 2, 03/2011
LEAK
SSA
N
× 2
)
.
N
) for less than 1/4 LSB leakage error (N = 8 in 8-bit
Preliminary
REFH
DDA
to V
SS
to V
Chapter 29 Analog-to-Digital Converter (ADC)
at a quiet point in the ground
SSA
REFL
.
.
AS
673

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