mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 980

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory Map/Register Definitions
39.4.26 USB OTG Control Register (USBx_CONTROL)
Addresses: USB0_CONTROL is FFFF_9000h base + 108h offset = FFFF_9108h
39.4.27 USB Transceiver Control Register 0 (USBx_USBTRC0)
Addresses: USB0_USBTRC0 is FFFF_9000h base + 10Ch offset = FFFF_910Ch
980
DPPULLUPNONOTG
USBRESET
Reset
Reset
Field
Reserved
Reserved
Read
Read
Write
Write USBRESET
7
Field
7–5
3–0
Bit
Bit
4
USB reset
Generates a hard reset to the USB_OTG module. After this bit is set and the reset occurs, this bit is
automatically cleared.
7
0
7
0
This read-only bitfield is reserved and always has the value zero.
Provides control of the DP PULLUP in the USB OTG module, if USB is configured in non-OTG
device mode.
0
1
This read-only bitfield is reserved and always has the value zero.
DP Pull up in non-OTG device mode is not enabled.
DP Pull up in non-OTG device mode is enabled.
0
0
0
0
6
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
USBx_CONTROL field descriptions
USBx_USBTRC0 field descriptions
USBRESMEN
Table continues on the next page...
0
0
5
5
Preliminary
0
0
4
4
Description
Description
0
0
0
3
3
0
0
2
2
Freescale Semiconductor, Inc.
0
SYNC_DET
0
0
1
1
RESUME_
USB_
INT
0
0
0
0

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