mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1323

no-image

mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mcf51jf128VLH
Manufacturer:
MITSUBISHI
Quantity:
321
Part Number:
mcf51jf128VLH
Manufacturer:
FREESCALE
Quantity:
5 097
Part Number:
mcf51jf128VLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf51jf128VLH
Manufacturer:
FREESCALE
Quantity:
5 097
50.4.3.4 Processor Status, Debug Data Definition
This section specifies the ColdFire processor and debug module's generation of the
processor status (PST) and debug data (DDATA) output on an instruction basis. In
general, the PST/DDATA output for an instruction is defined as follows:
where the {...} definition is optional operand information defined by the setting of the
CSR, and [...] indicates the presence of one value from the list.
The CSR provides capabilities to display operands based on reference type (read, write,
or both). A PST value {0x08, 0x09, or 0x0B} identifies the size and presence of valid
data to follow in the PST trace buffer (PSTB) {1, 2, or 4 bytes, respectively}.
Additionally, CSR[DDC] specifies whether operand data capture is enabled and what
size. Also, for certain change-of-flow instructions, CSR[BTB] provides the capability to
display the target instruction address in the PSTB (2 or 3 bytes) using a PST value of
0x0D or 0x0E, respectively.
50.4.3.4.1 User Instruction Set
The following table shows the PST/DDATA specification for user-mode instructions. Rn
represents any {Dn, An} register. In this definition, the y suffix generally denotes the
source, and x denotes the destination operand. For a given instruction, the optional
operand data is displayed only for those effective addresses referencing memory. The DD
nomenclature refers to the DDATA outputs.
Freescale Semiconductor, Inc.
add.l
add.l
adda.l
addi.l
addq.l
addx.l
and.l
and.l
andi.l
asl.l
asr.l
bcc.{b,w,l}
Instructio
n
PST = 0x01, {PST = 0x0[89B], DDATA = operand}
<ea>y,Dx
Dy,<ea>x
<ea>y,Ax
#<data>,Dx
#<data>,<ea>x
Dy,Dx
<ea>y,Dx
Dy,<ea>x
#<data>,Dx
{Dy,#<data>},Dx
{Dy,#<data>},Dx
Operand
Syntax
Table 50-42. PST/DDATA Specification for User-Mode Instructions
PST = 0x01, {PST = 0x0B, DD = source operand}
PST = 0x01, {PST = 0x0B, DD = source}, {PST = 0x0B, DD = destination}
PST = 0x01, {PST = 0x0B, DD = source operand}
PST = 0x01
PST = 0x01, {PST = 0x0B, DD = source}, {PST = 0x0B, DD = destination}
PST = 0x01
PST = 0x01, {PST = 0x0B, DD = source operand}
PST = 0x01, {PST = 0x0B, DD = source}, {PST = 0x0B, DD = destination}
PST = 0x01
PST = 0x01
PST = 0x01
if taken, then PST = 0x05, else PST = 0x01
PST/DDATA
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Table continues on the next page...
Preliminary
Chapter 50 Debug
1323

Related parts for mcf51jf128