mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1196

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory Map and Registers
46.3.9 Interrupt Edge Select Register (PCTLx_IES)
This register contains the edge select control bits.
Addresses: PCTLA_IES is FFFF_9200h base + 8h offset = FFFF_9208h
46.3.10 Port Digital Filter Enable Register (PCTLx_DFE)
This register contains the enable control bits for digital filters.
Addresses: PCTLB_DFE is FFFF_9210h base + 9h offset = FFFF_9219h
1196
PTEDG[7:0]
Reset
Field
Reset
Read
7–0
Read
Write
Write
Bit
Bit
PCTLB_IES is FFFF_9210h base + 8h offset = FFFF_9218h
PCTLC_IES is FFFF_9220h base + 8h offset = FFFF_9228h
PCTLD_IES is FFFF_9230h base + 8h offset = FFFF_9238h
PCTLE_IES is FFFF_9240h base + 8h offset = FFFF_9248h
PCTLF_IES is FFFF_9250h base + 8h offset = FFFF_9258h
PCTLC_DFE is FFFF_9220h base + 9h offset = FFFF_9229h
PCTLC_DFE is FFFF_9220h base + 9h offset = FFFF_9229h
PCTLD_DFE is FFFF_9230h base + 9h offset = FFFF_9239h
PCTLE_DFE is FFFF_9240h base + 9h offset = FFFF_9249h
PCTLF_DFE is FFFF_9250h base + 9h offset = FFFF_9259h
Only ports B and C have this register.
Edge selects of pin interrupt
Each EDG bit selects the falling edge/low level or rising edge/high level function of the corresponding pin.
0
1
7
0
7
0
Falling edge/low level.
Rising edge/high level.
0
0
6
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
PCTLx_IES field descriptions
0
0
5
5
Preliminary
NOTE
0
0
4
4
PTEDG[7:0]
PTDFE[7:0]
Description
0
0
3
3
0
0
2
2
Freescale Semiconductor, Inc.
0
0
1
1
0
0
0
0

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