mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 272

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Introduction
EMAC improvements target three primary areas:
The three areas of functionality are addressed in detail in following sections. The logic
required to support this functionality is contained in a MAC module as shown below.
12.1.1.1 Introduction to the MAC
The MAC is an extension of the basic multiplier in most microprocessors. It is typically
implemented in hardware within an architecture and supports rapid execution of signal
processing algorithms in fewer cycles than comparable non-MAC architectures. For
example, small digital filters can tolerate some variance in an algorithm's execution time,
but larger, more complicated algorithms such as orthogonal transforms may have more
demanding speed requirements beyond scope of any processor architecture and may
require full DSP implementation.
To balance speed, size, and functionality, the ColdFire MAC is optimized for a small set
of operations that involve multiplication and cumulative additions. Specifically, the
multiplier array is optimized for single-cycle pipelined operations with a possible
accumulation after product generation. This functionality is common in many signal
processing applications. The ColdFire core architecture is also modified to allow an
operand to be fetched in parallel with a multiply, increasing overall performance for
certain DSP operations.
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• Improved performance of 32 × 32 multiply operation.
• Addition of three more accumulators to minimize MAC pipeline stalls caused by
• A 48-bit accumulation data path to allow a 40-bit product, plus 8 extension bits
exchanges between the accumulator and the pipeline's general-purpose registers
increase the dynamic number range when implementing signal processing algorithms
Figure 12-1. Multiply-Accumulate Functionality Diagram
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Operand Y
Accumulator(s)
Preliminary
Shift 0,1,-1
+/-
X
Operand X
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