mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 312

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Registers
13.2.18 Clock Gate Control Register 6 (SIM_SCGC6)
Each bit in SCGC6 controls the clock gate to its respective module.
Address: SIM_SCGC6 is FFFF_80C0h base + 17h offset = FFFF_80D7h
312
USBOTG
USBDCD
PORTD
PORTC
PORTF
PORTE
Reset
Field
Read
Write
7
6
5
4
3
2
Bit
USBOTG
USBOTG clock gate control
Controls the clock gate to the USBOTG module.
0
1
USBDCD clock gate control
Controls the clock gate to the USBDCD module.
0
1
Port F clock gate control
Controls the clock gate to the Port F module.
0
1
Port E clock gate control
Controls the clock gate to the Port E module.
0
1
Port D clock gate control
Controls the clock gate to the Port D module.
0
1
Port C clock gate control
Controls the clock gate to the Port C module.
0
1
7
0
The clock to the module is disabled.
The clock to the module is enabled.
The clock to the module is disabled.
The clock to the module is enabled.
The clock to the module is disabled.
The clock to the module is enabled.
The clock to the module is disabled.
The clock to the module is enabled.
The clock to the module is disabled.
The clock to the module is enabled.
The clock to the module is disabled.
The clock to the module is enabled
USBDCD
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
SIM_SCGC6 field descriptions
PORTF
Table continues on the next page...
0
5
Preliminary
PORTE
0
4
Description
PORTD
0
3
PORTC
0
2
Freescale Semiconductor, Inc.
PORTB
0
1
PORTA
0
0