mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 957

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mcf51jf128

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mcf51jf128
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Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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39.4 Memory Map/Register Definitions
This section provides the memory map and detailed descriptions of all USB interface
registers.
Freescale Semiconductor, Inc.
The DMA_ERR bit is set in the ERR_STAT register for host
and device modes of operation. Depending on the values of
the INT_ENB and ERR_ENB register, the core may assert an
interrupt to notify the processor of the DMA error.
From here, the software can decide an appropriate course of action for future transactions such as stalling the endpoint,
canceling the transfer, disabling the endpoint, etc.
FFFF_900C Peripheral Additional Info Register (USB0_ADDINFO)
FFFF_9000
FFFF_9004
FFFF_9008
FFFF_9010
FFFF_9014
FFFF_9018
Absolute
address
• For host mode, the TOK_DNE interrupt fires and the
• In device mode, the BDT is not written back nor is the
(hex)
TOK_PID field of the BDT is 1111 to indicate the DMA
latency error. Host mode software can decide to retry
or move to next scheduled item.
TOK_DNE interrupt triggered because it is assumed
that a second attempt is queued and will succeed in the
future.
Errors due to Memory Latency
Peripheral ID Register (USB0_PERID)
Peripheral ID Complement Register (USB0_IDCOMP)
Peripheral Revision Register (USB0_REV)
OTG Interrupt Status Register (USB0_OTGISTAT)
OTG Interrupt Control Register (USB0_OTGICR)
OTG Status Register (USB0_OTGSTAT)
Table 39-5. USB Responses to DMA Overrun Errors (continued)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Register name
Table continues on the next page...
USBx memory map
Preliminary
The data written to memory is clipped to the MaxPacket size
so as not to corrupt system memory.
Asserts the DMA_ERR bit of the ERR_STAT register (which
could trigger an interrupt) and a TOK_DNE interrupt fires.
(Note: The TOK_PID field of the BDT is not 1111 because
the DMA_ERR is not due to latency).
The packet length field written back to the BDT is the
MaxPacket value that represents the length of the clipped
data actually written to memory.
Chapter 39 Universal Serial Bus (USB) Controller
Errors due to Oversized Packets
(in bits)
Width
8
8
8
8
8
8
8
Access
R/W
R/W
R/W
R
R
R
R
Reset value
FBh
04h
33h
01h
00h
00h
00h
Section/
39.4.1/
39.4.2/
39.4.3/
39.4.4/
39.4.5/
39.4.6/
39.4.7/
page
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