mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1174

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Registers
45.3.1 RGPIO Data Direction Register (RGPIO_DIR)
The read/write RGPIO_DIR register defines whether a properly-enabled RGPIO pin is
configured as an input or output:
At reset, all bits in the RGPIO_DIR are cleared.
Address: RGPIO_DIR is C00000h base + 0h offset = 00C0_0000h
1174
Reset
Read
Write
00C0_000A
00C0_000C
00C0_000E
00C0_0000
00C0_0002
00C0_0004
00C0_0006
00C0_0008
Absolute
address
• Setting any bit in RGPIO_DIR configures a properly-enabled RGPIO port pin as an
• Clearing any bit in RGPIO_DIR configures a properly-enabled RGPIO port pin as an
Bit
(hex)
output
input
15
0
RGPIO Data Direction Register (RGPIO_DIR)
RGPIO Data Register (RGPIO_DATA)
RGPIO Pin Enable Register (RGPIO_ENB)
RGPIO Clear Data Register (RGPIO_CLR)
RGPIO Data Direction Register (RGPIO_DIR)
RGPIO Set Data Register (RGPIO_SET)
RGPIO Data Direction Register (RGPIO_DIR)
RGPIO Toggle Data Register (RGPIO_TOG)
14
Writes to the two-byte fields at RGPIO_BASE + 0x8 and
RGPIO_BASE + 0xC are allowed, but do not affect any
program-visible register within the RGPIO module.
0
13
0
12
0
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Register name
11
0
10
0
RGPIO memory map
0
9
Preliminary
NOTE
0
8
DIR
0
7
0
6
(in bits)
Width
16
16
16
16
16
16
16
16
0
5
Access
R/W
R/W
R/W
W
W
W
R
R
0
4
Freescale Semiconductor, Inc.
Reset value
See section
See section
See section
0
3
0000h
0000h
0000h
0000h
0000h
0
2
0
1
Section/
45.3.1/
45.3.3/
45.3.4/
45.3.5/
45.3.2/
45.3.6/
45.3.8/
45.3.7/
page
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1175
1175
1176
1177
1177
1178
1178
0
0