mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1186

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Registers
46.2.2.1 Operation in wait mode
All EGPIO functions continue to operate in wait mode if enabled before execution of the
WAIT instruction. If a pin DMA request is not enabled (the PTDMAEN bit is 0), an
enabled interrupt pin (the corresponding PTIPEn bit is 1) can be used to bring the MCU
out of wait mode if the interrupt of EGPIO is enabled (the PTIE bit is 1).
46.2.2.2 Operation in stop mode
The pin interrupt function operates asynchronously in stop mode if enabled before
execution of the STOP instruction. Therefore, an enabled interrupt pin (the corresponding
PTIPEn bit is 1) can be used to bring the MCU out of stop mode if the interrupt of
EGPIO is enabled (the PTIE bit is 1) and either the digital filter on this pin is disabled
(bypass mode) or the digital filter continues to operate on the LPO clock.
The digital filter continues to operate if it is enabled and the LPO clock is selected for
digital filtering before entry to stop mode.
46.2.2.3 Operation in active background mode
When the MCU is in active background mode, all EGPIO functions continue to operate
normally.
46.3
1186
FFFF_9200
FFFF_9201
FFFF_9202
FFFF_9203
Absolute
address
(hex)
Memory Map and Registers
Port Pulling Enable Register (PCTLA_PUE)
Port Pullup/Pulldown Select Register (PCTLA_PUS)
Port Drive Strength Enable Register (PCTLA_DS)
Port Slew Rate Enable Register (PCTLA_SRE)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Register name
Table continues on the next page...
PCTL memory map
Preliminary
(in bits)
Width
8
8
8
8
Access
R/W
R/W
R/W
R/W
Freescale Semiconductor, Inc.
Reset value
00h
00h
00h
00h
Section/
46.3.1/
46.3.2/
46.3.3/
46.3.4/
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