mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1086

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Module Memory Map
43.3.20 UART FIFO Receive Watermark (UARTx_RWFIFO)
This register provides the ability to set a programmable threshold for notification of
needing to remove data from the receiver buffer/FIFO. This register may be read at any
time but should only be written when C2[RE] is not asserted. Changing the value in this
register will not clear the S1[RDRF] flag.
Addresses: UART0_RWFIFO is FFFF_8140h base + 15h offset = FFFF_8155h
43.3.21 UART FIFO Receive Count (UARTx_RCFIFO)
This is a read only register that indicates how many datawords are currently in the receive
buffer/FIFO. It may be read at anytime.
Addresses: UART0_RCFIFO is FFFF_8140h base + 16h offset = FFFF_8156h
1086
RXWATER
RXCOUNT
Reset
Field
Reset
Field
Read
7–0
Read
7–0
Write
Write
Bit
Bit
UART1_RWFIFO is FFFF_8160h base + 15h offset = FFFF_8175h
UART1_RCFIFO is FFFF_8160h base + 16h offset = FFFF_8176h
Receive Watermark
When the number of datawords in the Receive FIFO/buffer is equal to or greater than the value in this
register field the event is flagged. An interrupt via S1[RDRF] or a DMA request via C5[RDMAS] will be
generated as determined by C5[RDMAS] and C2[RIE] fields. For proper operation the value in the
RXWATER field must be set to be less than the size of the Receive buffer/FIFO size as indicated by
PFIFO[RXFIFOSIZE] and PFIFO[RXFE] and greater than 0.
Receive Counter
7
0
7
0
0
0
6
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
UARTx_RWFIFO field descriptions
UARTx_RCFIFO field descriptions
0
0
5
5
Preliminary
0
0
4
4
RXWATER
RXCOUNT
Description
Description
0
0
3
3
0
0
2
2
Freescale Semiconductor, Inc.
0
0
1
1
1
0
0
0