mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1269

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

50.3.5 Debug Control Register (DBGCR) and Debug Status
The 32-bit DBGCR and 32-bit DBGSR are accessible only via the BDM port. They
provide functionality for mass erase operations and for monitoring when the chip is or
was in low power modes.
The DBGCR and DBGSR are accessed indirectly via fields in the CSR3.
The CSR3 contains fields enabling indirect writes to the DBGCR. Writes to these CSR3
fields execute 4-bit nibble writes to the DBGCR. Thus, writing to the entire 32-bit
DBGCR would require eight "write CSR3" commands be processed via the single-pin
BDM interface.
When read, CSR3 enables indirect reads of the DBGSR. When a "read CSR3" command
is transmitted on the single-pin BDM interface, one byte of DBGSR is read and returned.
The debug logic maintains a 2-bit counter that selects the byte of the DBGSR register to
be read, starting with DBGSR[7:0]. The 2-bit counter is cleared by POR and by any write
to the CSR3. It is incremented by any read of the CSR3. Thus, a read of the entire 32-bit
DBGSR would require four "read CSR3" commands be processed on the single-pin BDM
interface, and the sequential commands would return data in the following order:
DBGSR[7:0], DBGSR[15:8], DBGSR[23:16], and DBGSR[31:24].
Using these registers, the flash memory mass erase procedure consists of these steps:
Freescale Semiconductor, Inc.
30–28
27–24
23–0
Field
WD
NS
31
UI
Register (DBGSR)
Update indicator for write to DBGCR
When set to 1, this bit signals the chip that an update has been completed and the content of the
DBGCR is valid.
Nibble select for write to DBGCR
This field selects which nibble in the DBGCR is written.
000
001
010
...
111
Write data to DBGCR
This field defines the data to be written into the selected nibble of the DBGCR. The selected nibble
is determined by the value of CSR3[30:28].
Reserved for future use by the debug module; must be cleared.
Description
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Table 50-15. CSR3 Field Descriptions
Write DBGCR[31:28]
Write DBGCR[27:24]
Write DBGCR[23:20]
...
Write DBGCR[3:0]
Preliminary
Chapter 50 Debug
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