mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 204
mcf51jf128
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mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF51JF128.pdf
(1339 pages)
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Module Signal Description Tables
9.7.6 Timer Modules
1. n = channel number (0 to 7)
2. j = fault input (0 to 3)
1. n = channel number (0 to 7)
2. j = fault input (0 to 3)
204
Chip signal name
Chip signal name
Chip signal name
Chip signal name
Chip signal name
TMR_CLKIN[1:0]
TMR_CLKIN[1:0]
TMR_CLKIN[1:0]
FTM0_QD_PHA
FTM0_QD_PHB
FTM0_FLT[2:0]
FTM1_FLT[2:0]
FTM0_CH[1:0]
FTM1_CH[5:0]
PDB0_EXTRG
CMT_IRO
Module signal
Module signal
Module signal
Module signal
Module signal
CMT_IRO
EXTCLK
FAULTj
EXTCLK
FAULTj
EXTRG
TCLK
CHn
CHn
name
name
name
name
name
PHA
PHB
MCF51JF128 Reference Manual, Rev. 2, 03/2011
1
1
Table 9-16. FTM0 Signal Descriptions
Table 9-17. FTM1 Signal Descriptions
Table 9-18. MTIM Signal Descriptions
Table 9-20. PDB0 Signal Descriptions
Table 9-19. CMT Signal Descriptions
2
2
external clock – FTM external clock can be selected to drive the
FTM counter.
channel (n) – I/O pin associated with FTM channel (n).
fault input (j) – input pin associated with fault input (j).
quadrature decoder phase A input – input pin associated with
quadrature decoder phase A.
quadrature decoder phase B input – input pin associated with
quadrature decoder phase B.
external clock – FTM external clock can be selected to drive the
FTM counter.
channel (n) – I/O pin associated with FTM channel (n).
fault input (j) – input pin associated with fault input (j).
External clock source input into MTIM16
Infrared Output
External trigger input source. If the PDB is enabled and external
trigger input source is selected, a positive edge on the EXTRG
signal resets and starts the counter.
Description
Description
Description
Description
Description
Preliminary
Freescale Semiconductor, Inc.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I
I
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