mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1183

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Chapter 46
Enhanced GPIO (EGPIO)
46.1 Introduction
This section explains software controls related to parallel input/output (I/O) and pin
control. Refer to the device's data sheet for more information about pin assignments and
external hardware considerations for these pins.
In addition to standard I/O port functionality, some ports have set, clear, and toggle
functions that are integrated as part of the ColdFire core itself to improve edge resolution
on those pins. For additional information, see the
description of Rapid GPIO (RGPIO). Refer to Port Mux details to identify the specific
ports that have this additional RGPIO functionality.
Many port pins are shared with on-chip peripherals such as timer systems,
communication systems, or keyboard interrupts as shown in
modules have priority over general-purpose I/O functions. When a peripheral is enabled,
the I/O functions associated with the shared pins may be disabled.
After reset, the shared peripheral functions are disabled and the pins are configured as
inputs (each PTDDn bit is 0). The pin control functions for each pin are configured as
follows: slew rate control is disabled (each PTSREn bit is 0), low drive strength is
selected (each PTDSn bit is 0), and internal pulls are disabled (each PTPUEn bit is 0).
Freescale Semiconductor, Inc.
Not all general-purpose I/O pins are available on all packages.
To avoid extra current drain from floating input pins, the user's
reset initialization routine in the application program must
either enable on-chip pullup devices or change the direction of
unconnected pins to outputs, so the pins do not float.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Note
Functional description
Figure
46-1. The peripheral
and the
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