mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 370

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory map/register definition
16.3.6 LLWU Flag 1 Register (LLWU_F1)
LLWU_F1 contains the wakeup flags indicating which wakeup source caused the MCU
to exit LLS or VLLS mode. For LLS, this will be the source causing the CPU interrupt
flow. For VLLS, this will be the source causing the MCU reset flow.
The external wakeup flags are read only and clearing a flag is accomplished by a write of
a one to the corresponding WUFx bit. The wakeup flag (WUFx) if set will remain set if
the associated WUPEx bit is cleared.
Address: LLWU_F1 is FFFF_80B0h base + 5h offset = FFFF_80B5h
370
WUME0
WUF7
WUF6
Field
Reset
Field
Read
Write
0
7
6
Bit
WUF7
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. It is unaffected by reset
types that do not trigger Chip Reset not VLLS. See the
details for more information.
w1c
Wakeup Module Enable for Module 0
Enables an internal module as a wakeup source input.
0
1
Wakeup Flag for LLWU_P7
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag write a one to WUF7.
0
1
Wakeup Flag for LLWU_P6
7
0
Internal module flag not used as wakeup source
Internal module flag used as wakeup source
LLWU_P7 input was not a wakeup source
LLWU_P7 input was a wakeup source
WUF6
w1c
LLWU_ME field descriptions (continued)
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
LLWU_F1 field descriptions
Table continues on the next page...
WUF5
w1c
0
5
Preliminary
NOTE
WUF4
w1c
0
4
Description
Description
WUF3
w1c
0
3
WUF2
w1c
0
2
Reset
Freescale Semiconductor, Inc.
WUF1
w1c
0
1
WUF0
w1c
0
0