mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 590
mcf51jf128
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mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF51JF128.pdf
(1339 pages)
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Overview
26.3 Overview
The set of implemented algorithms provides excellent support for network security
standards (SSL, IPsec). Additionally, using the CAU efficiently permits the
implementation of any higher level functions or modes of operation (HMAC, CBC, etc.)
based on the supported algorithms.
The cryptographic algorithms are implemented partially in software with only functions
critical to increasing performance implemented in hardware. The CAU allows for
efficient, fine-grained partitioning of functions between hardware and software:
This partitioning of functions is key to minimizing size of the CAU while maintaining a
high level of throughput. Using software for some functions also simplifies the CAU
design. The CAU implements a set of coprocessor commands that operate on a register
file of 32-bit registers. It is tightly coupled to the ColdFire core and there is no local
memory or external interface.
26.4 Features
The CAU includes these distinctive features:
26.5 Register Definition
The CAU contains multiple registers used by each of the supported algorithms. The
following table shows which registers are applicable to each supported algorithm, and
indicates the corresponding letter designations for each algorithm. For more information
on these letter designations, refer to the algorithm specifications.
590
• Implement the innermost security kernel functions using the coprocessor instructions
• Implement higher-level functions in software by using the standard processor
• Supports DES, 3DES, AES, MD5, SHA-1, and SHA-256 algorithms
• Simple, flexible programming model
instructions
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Freescale Semiconductor, Inc.
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