mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 878

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Functional Description
is reset and starts counting up. As long as the new state is stable on the fault input n, the
counter continues to increment. If the 5-bit counter overflows (the counter exceeds the
value of the FFVAL[3:0] bits), the new fault input n value is validated. It is then
transmitted as a pulse edge to the edge detector.
If the opposite edge appears on the fault input n signal before validation (counter
overflow), the counter is reset. At the next input transition, the counter starts counting
again. Any pulse that is shorter than the minimum value selected by FFVAL[3:0] bits (×
system clock) is regarded as a glitch and is not passed on to the edge detector.
The fault input n filter is disabled when the FFVAL[3:0] bits are zero or when
FAULTnEN = 0. In this case the fault input n signal is delayed 2 rising edges of the
system clock and the FAULTFn bit is set on 3th rising edge of the system clock after a
rising edge occurs on the fault input n.
If FFVAL[3:0] ≠ 0000 and FAULTnEN = 1, then the fault input n signal is delayed (3 +
FFVAL[3:0]) rising edges of the system clock, that is, the FAULTFn bit is set (4 +
FFVAL[3:0]) rising edges of the system clock after a rising edge occurs on the fault input
n.
If the fault control and fault input n are enabled and a rising edge at the fault input n
signal is detected, then the FAULTFn bit is set. The FAULTF bit is the logic OR of
FAULTFn[3:0] bits (see the following figure).
878
* where n = 3, 2, 1, 0
system clock
fault input n*
Figure 37-200. FAULTF and FAULTIN Bits and Fault Interrupt
Figure 37-199. Fault Input n Control Block Diagram
D
CLK
synchronizer
Q
MCF51JF128 Reference Manual, Rev. 2, 03/2011
FAULTF0
FAULTF1
FAULTF2
FAULTF3
D
CLK
fault input 0 value
fault input 1 value
fault input 2 value
fault input 3 value
Q
(5-bit counter)
Fault filter
Preliminary
(FFVAL[3:0]
and (FFLTRnEN*)
FAULTIE
0
1
0000)
FAULTIN
fault input
FLTnPOL
polarity
control
FAULTF
fault interrupt
detector
edge
Freescale Semiconductor, Inc.
rising edge
fault input n* value
FAULTFn*

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