HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 100

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 2 CPU
2.5.2
There are two processor modes: privileged mode and user mode. The processor mode is
determined by the processor mode bit (MD) in the status register (SR). User mode is selected
when the MD bit is 0, and privileged mode when the MD bit is 1. When the reset state or
exception state is entered, the MD bit is set to 1. When exception handling ends, the MD bit is
cleared to 0 and user mode is entered. There are certain registers and bits which can only be
accessed in privileged mode.
Rev. 5.00 May 29, 2006 page 50 of 698
REJ09B0146-0500
Note: * The hardware standby mode is entered when the CA pin goes low level from any state.
Interrupt
CA = 1, RESETP=0
Processor Modes
From any state when
RESETP = 0
Bus
request
Bus-released state
Sleep mode
Bus
request
clearance
Power-on reset
Figure 2.6 Processor State Transitions
state
RESETP = 1
bit cleared
with STBY
Hardware standby mode *
instruction
Exception
interrupt
SLEEP
Exception-handling state
Program execution state
RESETP = 0
From any state but hardware standby
mode or bus-released state when RESETM = 0
End of exception
transition
processing
RESETM = 1
SLEEP
instruction
Software standby mode
Manual reset
with STBY
bit set
state
Reset state
Power-down state
Interrupt