HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 192

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 7 User Break Controller
7.2.2
BAMRA is a 32-bit read/write register. BAMRA specifies bits masked in the break address
specified by BARA.
Note: n = 31 to 0.
7.2.3
Break bus cycle register A (BBRA) is a 16-bit read/write register, which specifies (1) CPU cycle
or DMAC cycle, (2) instruction fetch or data access, (3) read or write, and (4) operand size in the
break conditions of channel A.
Rev. 5.00 May 29, 2006 page 142 of 698
REJ09B0146-0500
Bit
31 to 0
Break Address Mask Register A (BAMRA)
Break Bus Cycle Register A (BBRA)
Bit Name
BAMA31 to
BAMA0
Initial Value
All 0
R/W
R/W
Description
Break Address Mask Bit
Specifies bits masked in the channel A break
address bits specified by BARA (BAA31 to
BAA0).
0: Break address bit BAAn of channel A is
1: Break address bit BAAn of channel A is
included in the break condition
masked and is not included in the break
condition