HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 130

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Section 3 Memory Management Unit (MMU)
3.7.2
An erroneous value is set in the RC bit in MMUCR when all of the following conditions are
satisfied.
1. MMU is on (AT bit in MMUCR is 1)
2. Same VPN exists in more than one ways in a single entry in a TLB address array
3. TLB exception is generated
VPN is not initialized by a power-on reset or a manual reset. Therefore, two or more VPNs have
the same values in a single entry. When an entry in this state is registered to way 3, for example,
the state of that entry in the TLB address array becomes as shown below. As a result, the same
VPN exists in both way 0 and way 3, and condition 2 above is satisfied.
A condition may also be satisfied when the TLB is handled by software. For example, if an entry
in the TLB address array is registered to way 3 after way 0 is disabled (V bit is changed from 1 to
0), the state of that entry becomes as shown below. Similar to the above case, the same VPN exists
in both way 0 and way 3, and condition 2 above is satisfied.
To avoid this failure, take the following two countermeasures.
1. After a reset, initialize the upper four bits in VPN to 1 for all entries in the TLB address array
2. When disabling a way in the TLB address array, in addition to clearing the V bit to 0, initialize
These countermeasures will prevent VPN from being a target of address translation. Accordingly,
condition 3 is not satisfied, and this failure can be avoided.
Rev. 5.00 May 29, 2006 page 80 of 698
REJ09B0146-0500
until the AT bit in MMUCR is set to 1.
the upper four bits in VPN to 1.
Use of TLB
WAY
WAY
After way 0 is disabled
0
3
0
3
After reset
12345
12345
12345
11111
VPN
VPN
V
V
0
0
0
0
WAY
After registered to way 3
WAY
After registered to way 3
0
3
0
3
12345
12345
12345
12345
VPN
VPN
V
V
0
1
0
1

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