HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 445

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Transmitting and Receiving Data (SCI Initialization (Asynchronous Mode)): Before
transmitting or receiving, clear the TE and RE bits to 0 in the serial control register (SCSCR), then
initialize the SCI as follows.
When changing the operation mode or communication format, always clear the TE and RE bits to
0 before following the procedure given below. Clearing TE to 0 sets TDRE to 1 and initializes the
transmit shift register (SCTSR). Clearing RE to 0, however, does not initialize the RDRF, PER,
FER, and ORER flags or receive data register (SCRDR), which retain their previous contents.
When an external clock is used, the clock should not be stopped during initialization or subsequent
operation. SCI operation becomes unreliable if the clock is stopped.
Figure 14.7 is a sample flowchart for initializing the SCI.
Clear TE and RE bits in SCSCR to 0
Set CKE1 and CKE0 bits in SCSCR
Set TE and RE bits in SCSCR to 1
and set RIE, TEIE, and MPIE bits
Select transmit/receive
(TE and RE bits are 0)
Figure 14.7 Sample Flowchart for SCI Initialization
Set value to SCBRR
format in SCSMR
interval elapsed?
Has a 1-bit
Initialize
End
Yes
Wait
No
Section 14 Serial Communication Interface (SCI)
1.
2.
3.
4.
Select the clock source in the SCSCR.
Leave RIE, TIE, TEIE, MPIE, TE, and
RE cleared to 0. If clock output is
selected in asynchronous mode,
clock output starts immediately after
the setting is made to SCSCR.
Select the communication format in the
SCSMR.
Write the value corresponding to the bit
rate in SCBRR unless an external clock
is used.
Wait for at least the interval required to
transmit or receive one bit, then set TE
or RE in the SCSCR to 1. Also set RIE,
TIE, TEIE, and MPIE as necessary.
Setting TE or RE enables the SCI to use
the TxD0 or RxD0 pin. The initial states
are the mark transmit state, and the idle
receive state (waiting for a start bit).
Rev. 5.00 May 29, 2006 page 395 of 698
REJ09B0146-0500